there is still a moment: sys_config.fex file contains the following line
vind0_clk = 384000000
vind0 - this is the video input module, and in src kernel files we can see following lines:
of_property_read_u32(np, "vind0_clk", &core_clk);
vind->clk[VIN_TOP_CLK].frequency = core_clk;
where VIN_TOP_CLK is the clock of module CSIS module(hardware)! WHY 384MHz ??!! )))
in kernel code, in vin.c file we can see isp_clk = 297MHz .. WHY!!??? (may be it from pll9)
2-nd: we have in imx317_mipi.c file following: pixel clock = 720Mhz! mipi bitrate = 576MHz!
why 384MHz, if thepixel clock is 720MHz or the mipi bitrate is 576MHz ))))
vind0_clk = 384000000
vind0 - this is the video input module, and in src kernel files we can see following lines:
of_property_read_u32(np, "vind0_clk", &core_clk);
vind->clk[VIN_TOP_CLK].frequency = core_clk;
where VIN_TOP_CLK is the clock of module CSIS module(hardware)! WHY 384MHz ??!! )))
in kernel code, in vin.c file we can see isp_clk = 297MHz .. WHY!!??? (may be it from pll9)
2-nd: we have in imx317_mipi.c file following: pixel clock = 720Mhz! mipi bitrate = 576MHz!
why 384MHz, if thepixel clock is 720MHz or the mipi bitrate is 576MHz ))))